Any ripple on your oscillator's DC supply can pump the VCO and cause noise modulation. The oscillator and 1 buffer run on a AF low-pass filtered 8 volt DC supply. A frequency counter proves essential, since this style of synthesizer uses a VXO with non-linear tuning plus frequency overlap or gaps may occur across different divisions of the reference oscillator. This VCO provides 3 output ports: main, offset mixer and a port to connect a frequency counter. The output of the main VCO looks good for a home brew PLL system.Ībove - The VCO schematic. The filter allows the PLL to locks quickly and filters well. At low frequencies it functions as a first order filter. Above ~ 80 KHz, the op-amp loop filter = a third order filter. A 5% 1K2 resistor might not cut it! Hence, a 1K5 Ω 5% part might be a better choice if you don't have a 1% 1K2 Ω resistor in stock.įor the op-amp filter, two, small, 63v, polyester 1 ♟ caps were placed in parallel since I lacked a 2.2 ♟ capacitor. If I went below that resistance, the feedback loop goes into spasm and oscillates. The critical dampening resistance value in my loop was ~ 1170 to 1188 Ω. The 1K2 loop dampening resistor posed critical, so I employed a 1% part in that slot. Since the VCO operates over a very narrow bandwidth, you can filter the loop well. While we enjoy lower noise op-amps today, I got them for low cost long ago and they impart some nostalgia on my bench - and the OP-27 is still a great part. You'll find the OP-27 in PLL circuits published decades ago. I stuck with the classic, low-noise, OP-27 for the loop filter. For the 2 remaining NAND gates: Ground the input pins of one gate while using the other gate to reset pins 1 and 13 in your phase/frequency detector. Any old bench sine wave oscillator from AF to HF will test the 74HC00 squarer. Then use that output to test the 4-bit counter. For example, build the 2 MHz Pierce oscillator and look at its output. My 5 volt 74HC00 DC supply is bypassed from AF to HF and the signal path input is also decoupled and bypassed with the 51 Ω / 470pF network.įor the PLL board, it's literally test as you go. With no AC input signal, a CMOS squarer may oscillate somewhere between between ~2 and 70 MHz. Above - The 74HC00 signal squarer in my DSO when tested with a 7.04 MHz signal generator.
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